This invention relates to a circuit for detecting a state in which the disc rotation speed in a video disc playback device is double a normal speed (hereinafter called "double speed").
The control of rotation of a disc motor in a video disc playback device is generally made by switching between an AFC (auto frequency control) and a PLL (phase locked loop). The AFC is a relatively rough control according to which rotation of a disc motor is controlled by comparing, in frequency, a pulse generated from a frequency generator with a period corresponding to the rotation speed of the disc motor, with a reference pulse produced from a crystal oscillator output. The PLL is a relatively accurate control according to which rotation of the disc motor is controlled by comparing, in phase, a horizontal synchronizing signal picked up from a signal reproduced from the disc with a reference clock produced from a crystal oscillator output.
In starting the disc motor, rotation is started with the AFC and, when a state in which a signal is reproduced from the disc and the PLL can be implemented by comparing the horizontal synchronizing signal with the reference clock in phase has been brought about, the control is switched from the AFC to the PLL.
A target rotation speed according to the AFC is set at the same speed as a rotation speed at the innermost circumference both of a CLV disc and a CAV disc (1800 rpm). In the case of the CLV disc, therefore, the rotation speed at the innermost circumference becomes more than double a rotation speed at an outer circumference (600 rpm at the outermost circumference). If, accordingly, the PLL is unlocked at the outer circumference and the mode is switched to the AFC, there is possibility that the rotation speed will reach double a proper rotation speed.
Detection of a horizontal synchronizing signal in the PLL is effected, as shown in FIG. 2, by detecting falling of a synchronizing component signal obtained from a signal reproduced from a disc. For removing noise and equalizing pulses occurring in a vertical interval and obtaining a normal horizontal synchronizing signal only, a so-called window is established in a time section in which the horizontal synchronizing signal is expected to occur.
In a double speed state, therefore, the horizontal synchronizing signal which occurs with a 1/2 period of a normal period is removed alternately by the window so that the window output is not different from that during a normal rotation. Accordingly, an erroneous switching to the PLL and locking at the PLL will take place despite the double speed state unless there is some means for detecting existence of the double speed state.
It is, therefore, an object of the invention to provide a double speed detection circuit in a video disc playback device capable of accurately detecting a double speed state in the disc rotation.